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Open Sustainable Technology

https://github.com/nic30/hwt

VHDL/Verilog/SystemC code generator, simulator API written in python/c++
codegen codegenerator compiler fpga hcl hls rtl simulator systemc systemverilog uvm verilog vhdl
Added: over 1 year ago - Last Synced: 11 months ago - Created: May 19, 2015

  • Relevant topics? true
  • External users? true
  • Open source license? true
  • Active? true
  • Fork? false
  • Main Language: Python
  • Commits: 3006
  • Committers: 12
  • Issues: 39
  • Pull Requests: 3
  • Owner: Nic30
  • Stars: 194
  • Forks: 26
  • Packages: 1
  • Downloads: 97
https://github.com/intel/rohd-cosim

Cosimulation for the Rapid Open Hardware Development (ROHD) framework with other simulators
co-simulation cocotb cosim cosimulation dart framework hardware hardware-design hardware-verification python rohd rohd-vf rtl simulator
Added: over 1 year ago - Last Synced: 11 months ago - Created: February 02, 2023

  • Relevant topics? true
  • External users? true
  • Open source license? true
  • Active? true
  • Fork? false
  • Main Language: Dart
  • Commits: 17
  • Committers: 2
  • Issues: 23
  • Pull Requests: 12
  • Owner: intel
  • Stars: 14
  • Forks: 3
  • Packages: 1