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Open Sustainable Technology

https://github.com/nic30/hwt

VHDL/Verilog/SystemC code generator, simulator API written in python/c++
codegen codegenerator compiler fpga hcl hls rtl simulator systemc systemverilog uvm verilog vhdl
Added: over 1 year ago - Last Synced: about 1 year ago - Created: May 19, 2015

  • Relevant topics? true
  • External users? true
  • Open source license? true
  • Active? true
  • Fork? false
  • Main Language: Python
  • Commits: 3006
  • Committers: 12
  • Issues: 39
  • Pull Requests: 3
  • Owner: Nic30
  • Stars: 194
  • Forks: 26
  • Packages: 1
  • Downloads: 97
https://github.com/xilinx/libsystemctlm-soc

SystemC/TLM-2.0 Co-simulation framework
co-simulation qemu systemc tlm2
Added: over 1 year ago - Last Synced: about 1 year ago - Created: October 27, 2016

  • Relevant topics? true
  • External users? true
  • Open source license? true
  • Active? true
  • Fork? false
  • Main Language: Verilog
  • Commits: 586
  • Committers: 21
  • Issues: 24
  • Pull Requests: 9
  • Owner: Xilinx
  • Stars: 196
  • Forks: 66
  • Packages: 0
https://github.com/xilinx/systemctlm-cosim-demo

QEMU libsystemctlm-soc co-simulation demos.
co-simulation qemu systemc tlm2
Added: over 1 year ago - Last Synced: about 1 year ago - Created: October 27, 2016

  • Relevant topics? true
  • External users? true
  • Open source license? true
  • Active? true
  • Fork? false
  • Main Language: C++
  • Commits: 120
  • Committers: 14
  • Issues: 30
  • Pull Requests: 6
  • Owner: Xilinx
  • Stars: 105
  • Forks: 44
  • Packages: 0