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Open Sustainable Technology

https://github.com/wyvernsemi/riscv

Open source ISS and logic RISC-V 32 bit project
32-bit c-plus-plus co-simulation cpu-model embedded-systems fpga iss linux processor risc-processor risc-v soft-core verilog
Added: over 1 year ago - Last Synced: 11 months ago - Created: July 20, 2021

  • Relevant topics? true
  • External users? true
  • Open source license? true
  • Active? true
  • Fork? false
  • Main Language: C++
  • Commits: 149
  • Committers: 2
  • Issues: 1
  • Pull Requests: 0
  • Owner: wyvernSemi
  • Stars: 26
  • Forks: 10
  • Packages: 0
https://github.com/thesecretclub/riscy-business

RISC-V Virtual Machine
llvm obfuscation risc-v virtual-machine windows
Added: over 1 year ago - Last Synced: 11 months ago - Created: October 21, 2023

  • Relevant topics? true
  • External users? true
  • Open source license? true
  • Active? true
  • Fork? false
  • Main Language: C
  • Commits: 85
  • Committers: 3
  • Issues: 1
  • Pull Requests: 4
https://github.com/risc0/risc0

RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.
cryptography risc-v rust stark virtual-machine zero-knowledge
Added: over 1 year ago - Last Synced: 11 months ago - Created: February 19, 2022

  • Relevant topics? true
  • External users? true
  • Open source license? true
  • Active? true
  • Fork? false
  • Main Language: C++
  • Commits: 809
  • Committers: 69
  • Issues: 795
  • Pull Requests: 1831
  • Owner: risc0
  • Stars: 1350
  • Forks: 267
  • Packages: 41
  • Downloads: 1,047,145